Pure Mathematics

Have TITAN, an ultra low-power, low-cost PC/104 form-factor Single Board Computer (SBC) based on the Intel PXA270 XScale processor.

Using virt-manager via Ubuntu 25.04 to run Ubuntu 5.04 for compiling C code. Using minicom to serial connect to SBC to send compiled C code for execution.

Used eCos (RTOS) and AEL Embedded Linux to write C code to blink LED via I2C and GPIO. Opened the I2C bus and acquired bus access successfully. Written to GPIO to blink LED successfully. The delay currently uses the CPU clock speed which is not ideal. I am researching solution using a timer and an interrupt which use various registers; hoping these are not locked down like the registers for the GPIO block forcing me to use I2C to access GPIO pin! The assembly code aligns with the ARM processor documentation and the PXA270 processor is ARM compliant!

Created blink-led-timer-interrupt.sh to compile and link blink-led-timer-interrupt.c to status irq, enable irq and disable irq.

#!/bin/sh

echo "Remove object file..."

rm blink-led-timer-interrupt.o

echo "Compiling..."

arm-linux-gcc -c -Winline blink-led-timer-interrupt.c -o blink-led-timer-interrupt.o

echo "Linking..."

arm-linux-ld --verbose --entry=0x00400000 -T blink-led-timer-interrupt.ld -N -Map blink-led-timer-interrupt.map blink-led-timer-interrupt.o -o blink-led-timer-interrupt.elf

echo "Complete!"

Checking correct entry point:

readelf -a blink-led-timer-interrupt.elf|grep Entry

Entry point address: 0x400000

Using RedBoot to transfer blink-led-timer-interrupt binary file from host to RAM on the SBC before typing 'go'. Examined RAM before and after execution. See below.

RedBoot(tm) bootstrap and debug environment [ROM]

Non-certified release, version W504 V1I2 - built 11:23:55, Sep 3 2007

Platform: Arcom TITAN (XScale PXA270)

RAM: 0x00000000-0x04000000, [0x00400000-0x03fd1000] available

FLASH: base 0x60000000, size 0x02000000, 256 blocks of 0x00020000 bytes each.

== Executing boot script in 1.000 seconds - enter ^C to abort

RedBoot> load -r -b %{FREEMEMLO} -m ymodem

CRaw file loaded 0x00400000-0x00400400, assumed entry at 0x00400000

xyzModem - CRC mode, 11(SOH)/0(STX)/0(CAN) packets, 7 retries

RedBoot> x -b 0x00500000 -l 0x10

00500000: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF |................|

RedBoot> go

Program completed with status 0

RedBoot> x -b 0x00500000 -l 0x10

00500000: D3 00 00 00 53 00 00 00 D3 00 00 00 FF FF FF FF |....S...........|

RedBoot>

So, ARM Assembly code, to status irq, enable irq and disable irq, loaded directly in RAM via RedBoot and executed successfully. I examined RAM before and after execution at each stage. 0xD3 = 1101 0011 and 0x53 = 0101 0011. So, bit 7 has toggled as expected meaning all ARM Assembly code executed successfully. Proceeding onto C code for timer and interrupt.

Please click the following buttons to view video and C code which will appear below buttons.

General:
Code: